Senior Machine Learning Compiler Engineer opportunity to work for a company focused on software IP Solutions and Engineering Services.

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RemotoRemotoSêniorCLT9 dias atrás

Salário Estimado

R$ 16.445,00 - R$ 24.668,00

Tecnologias

Machine Learning Ai

100de 100

Excelente

Score de Match

Descrição da Vaga

Machine Learning Compiler Engineer Long term conract Office located in Mountain View, CA(100% remote considered) Description As a Machine Learning Compiler Engineer, you will:

•Architect and develop the compiler for our customer s proprietary AI Accelerator, optimizing it for deep learning inference with a focus on performance, scalability, and power efficiency

•Collaborate with cross-functional teams, including hardware and platform architecture teams, to bring new hardware silicon to market and ensure compiler support for next-gen features • Lead the design and implementation of complex compiler features, advancing both technical capabilities and strategic alignment across the team and company

•Play an instrumental role in defining new compiler architecture approaches and optimizations, balancing trade-offs between performance, energy efficiency, and hardware constraints • Identify and drive initiatives that will improve the scalability and general performance of AI workloads on customer hardware, contributing to the vision and roadmap of the hardware team Minimum Qualifications

•Bachelor s degree in Computer Science, Computer Engineering, or a related field with 3 years of relevant experience • Strong experience with program analysis and IR (Intermediate Representation), or programming language design, TVM or MLIR and LLVM

•Proven expertise in compiler design and architecture, including deep experience with front-end and middle-end optimizations, register allocation, and back-end code generation • High-level proficiency in C++ and experience working with large, complex software systems

•Strong fundamental experience in Machine Learning & Deep Learning. • Extremely well versed in ONNX operators, Operator level fusion, and related techniques Preferred Qualifications

•Master's or PhD degree in Computer Science, Computer Engineering, or a related field • Demonstrated ability to ship high-quality production software

•Strong communication skills and ability to collaborate effectively across teams and functions • Experience optimizing compilers for distributed, parallel, or heterogeneous execution environments, with a solid understanding of shared memory, synchronization, and multi-threading techniques

•Expertise in neural network inference on specialized SoCs or GPUs, and knowledge of deep learning frameworks and tools • Familiarity with Just-in-Time (JIT) compilation and dynamic optimization techniques for real-time code execution

Requisitos

Bachelor s degree in Computer Science, Computer Engineering, or a related field with 3 years of relevant experience
Strong experience with program analysis and IR (Intermediate Representation), or programming language design, TVM or MLIR and LLVM
Proven expertise in compiler design and architecture, including deep experience with front-end and middle-end optimizations, register allocation, and back-end code generation
High-level proficiency in C++ and experience working with large, complex software systems
Strong fundamental experience in Machine Learning & Deep Learning
Extremely well versed in ONNX operators, Operator level fusion, and related techniques

Responsabilidades

Architect and develop the compiler for our customer s proprietary AI Accelerator, optimizing it for deep learning inference with a focus on performance, scalability, and power efficiency
Collaborate with cross-functional teams, including hardware and platform architecture teams, to bring new hardware silicon to market and ensure compiler support for next-gen features
Lead the design and implementation of complex compiler features, advancing both technical capabilities and strategic alignment across the team and company
Play an instrumental role in defining new compiler architecture approaches and optimizations, balancing trade-offs between performance, energy efficiency, and hardware constraints
Identify and drive initiatives that will improve the scalability and general performance of AI workloads on customer hardware, contributing to the vision and roadmap of the hardware team